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[IEEE 2012 VIII Southern Conference on Programmable Logic (SPL) - Bento Goncalves (2012.03.20-2012.03.23)] 2012 VIII Southern Conference on Programmable Logic - HardNoC: A platform to validate networks on chip through FPGA prototyping

✍ Scribed by Heck, G.; Guazzelli, R.; Moraes, F.; Calazans, N.; Soares, R.

Book ID: 125856362
Publisher: IEEE
Year: 2012
Weight: 513 KB
Category: Article
ISBN: 146730185X
DOI: 10.1109/SPL.2012.6211781

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