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[IEEE 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) - Santa Cruz, CA, USA (2012.10.7-2012.10.10)] 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC) - 3D-LIN: A configurable low-latency interconnect for multi-core clusters with 3D stacked L1 memory

✍ Scribed by Beanato, Giulia; Loi, Igor; De Micheli, Giovanni; Leblebici, Yusuf; Benini, Luca

Book ID: 120023701
Publisher: IEEE
Year: 2012
Weight: 158 KB
Category: Article
ISBN: 1467326569
DOI: 10.1109/VLSI-SoC.2012.6379001

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