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[IEEE 2012 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2012.06.13-2012.06.15)] 2012 Symposium on VLSI Circuits (VLSIC) - A 2.8GS/s 44.6mW time-interleaved ADC achieving 50.9dB SNDR and 3dB effective resolution bandwidth of 1.5GHz in 65nm CMOS

✍ Scribed by Stepanovic, Dusan; Nikolic, Borivoje

Book ID: 120073316
Publisher: IEEE
Year: 2012
Weight: 714 KB
Category: Article
ISBN: 1467308455
DOI: 10.1109/VLSIC.2012.6243801

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