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[IEEE 2012 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2012.06.13-2012.06.15)] 2012 Symposium on VLSI Circuits (VLSIC) - 1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times

✍ Scribed by Ohsawa, T.; Koike, H.; Miura, S.; Honjo, H.; Tokutome, K.; Ikeda, S.; Hanyu, T.; Ohno, H.; Endoh, T.


Book ID
118176805
Publisher
IEEE
Year
2012
Weight
895 KB
Category
Article
ISBN
1467308455

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