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[IEEE 2012 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2012.02.19-2012.02.23)] 2012 IEEE International Solid-State Circuits Conference - A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65nm CMOS

✍ Scribed by Sai, Akihide; Kobayashi, Yuka; Saigusa, Shigehito; Watanabe, Osamu; Itakura, Tetsuro

Book ID: 111879194
Publisher: IEEE
Year: 2012
Weight: 640 KB
Volume: 0
Category: Article
ISBN: 1424449685
DOI: 10.1109/isscc.2012.6176996

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