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[IEEE 2011 International Symposium on Low Power Electronics and Design (ISLPED) - Fukuoka, Japan (2011.08.1-2011.08.3)] IEEE/ACM International Symposium on Low Power Electronics and Design - Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation

✍ Scribed by Chang, Ming-Hung; Hsieh, Chung-Ying; Chen, Mei-Wei; Hwang, Wei

Book ID: 121739480
Publisher: IEEE
Year: 2011
Weight: 809 KB
Category: Article
ISBN: 1612846580
DOI: 10.1109/ISLPED.2011.5993597

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