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[IEEE 2011 International Symposium on Low Power Electronics and Design (ISLPED) - Fukuoka, Japan (2011.08.1-2011.08.3)] IEEE/ACM International Symposium on Low Power Electronics and Design - Investigation of determinant factors of minimum operating voltage of logic gates in 65-nm CMOS

✍ Scribed by Yasufuku, Tadashi; Iida, Satoshi; Fuketa, Hiroshi; Hirairi, Koji; Nomura, Masahiro; Takamiya, Makoto; Sakurai, Takayasu

Book ID: 118006047
Publisher: IEEE
Year: 2011
Weight: 582 KB
Volume: 0
Category: Article
ISBN: 1612846580
DOI: 10.1109/islped.2011.5993598

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