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[IEEE 2011 International Symposium on Integrated Circuits (ISIC) - Singapore, Singapore (2011.12.12-2011.12.14)] 2011 International Symposium on Integrated Circuits - Comparative design of floating-point arithmetic units using the Balsa synthesis system

✍ Scribed by Chen, Ren-Der; Chou, Yu-Cheng; Liu, Wan-Chen

Book ID: 125547049
Publisher: IEEE
Year: 2011
Weight: 170 KB
Category: Article
ISBN: 1612848648
DOI: 10.1109/ISICir.2011.6131905

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