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[IEEE 2011 6th International Symposium on Parallel Computing in Electrical Engineering (PARELEC) - Luton, United Kingdom (2011.04.3-2011.04.7)] 2011 Sixth International Symposium on Parallel Computing in Electrical Engineering - Optimising Heterogeneous 3D Networks-on-Chip

✍ Scribed by Agyeman, Michael Opoku; Ahmadinia, Ali

Book ID: 120285314
Publisher: IEEE
Year: 2011
Weight: 667 KB
Category: Article
ISBN: 1457700786
DOI: 10.1109/PARELEC.2011.40

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