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[IEEE 2011 24th International Conference on VLSI Design: concurrently with the 10th International Conference on Embedded Systems Design - Chennai (2011.01.2-2011.01.7)] 2011 24th Internatioal Conference on VLSI Design - A 1.8GHz Digital PLL in 65nm CMOS

✍ Scribed by Chattopadhyay, B; Kamath, A S; Nayak, G

Book ID: 120049597
Publisher: IEEE
Year: 2011
Weight: 457 KB
Category: Article
ISBN: 1612843271
DOI: 10.1109/VLSID.2011.32

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