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[IEEE 2010 International Symposium on Electronic System Design (ISED 2010) - Bhubaneswar (2010.12.20-2010.12.22)] 2010 International Symposium on Electronic System Design - A Taylor Expansion Diagram Approach for Nano-CMOS RTL Leakage Optimization

✍ Scribed by Banerjee, S; Mathew, J; Pradhan, D K; Mohanty, S P; Ciesielski, M

Book ID: 118172171
Publisher: IEEE
Year: 2010
Weight: 371 KB
Volume: 0
Category: Article
ISBN: 1424489792
DOI: 10.1109/ised.2010.22

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