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[IEEE 2010 International Conference on Field Programmable Logic and Applications (FPL) - Milan, Italy (2010.08.31-2010.09.2)] 2010 International Conference on Field Programmable Logic and Applications - FPGA Implementations of the Round Two SHA-3 Candidates

✍ Scribed by Baldwin, Brian; Byrne, Andrew; Lu, Liang; Hamilton, Mark; Hanley, Neil; O'Neill, Maire; Marnane, William P.

Book ID: 120137404
Publisher: IEEE
Year: 2010
Weight: 692 KB
Category: Article
ISBN: 1424478421
DOI: 10.1109/FPL.2010.84

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