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[IEEE 2010 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2010.02.7-2010.02.11)] 2010 IEEE International Solid-State Circuits Conference - (ISSCC) - A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache

✍ Scribed by Barth, John; Plass, Don; Nelson, Erik; Hwang, Charlie; Fredeman, Gregory; Sperling, Michael; Mathews, Abraham; Reohr, William; Nair, Kavita; Cao, Nianzheng

Book ID: 121673276
Publisher: IEEE
Year: 2010
Weight: 500 KB
Category: Article
ISBN: 1424460336
DOI: 10.1109/ISSCC.2010.5433814

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