𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - A hybrid dual-core Reconfigurable Processor for EBCOT tier-1 encoder in JPEG2000 on next generation of digital cameras

✍ Scribed by Zhao, Xin; Erdogan, Ahmet T.; Arslan, Tughrul

Book ID: 121734109
Publisher: IEEE
Year: 2010
Weight: 331 KB
Category: Article
ISBN: 142448734X
DOI: 10.1109/DASIP.2010.5706250

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 2010 Conference on Design and Arch

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - A dynamically reconfigurable asynchronous processor for low power applications

✍ Fawaz, K.A.; Arslan, T.; Khawam, S.; Muir, M.; Nousias, I.; Lindsay, I.; Erdogan 📂 Article 📅 2010 🏛 IEEE ⚖ 314 KB

[IEEE 2010 Conference on Design and Arch

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - GPU architecture evaluation for multispectral and hyperspectral image analysis

✍ Fresse, Virginie; Houzet, Dominique; Gravier, Christophe 📂 Article 📅 2010 🏛 IEEE ⚖ 659 KB

[IEEE 2010 Conference on Design and Arch

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - High speed Fp multipliers and adders on FPGA platform

✍ Ghosh, Santosh; Mukhopadhyay, Debdeep; Chowdhury, Dipanwita Roy 📂 Article 📅 2010 🏛 IEEE ⚖ 161 KB

[IEEE 2010 Conference on Design and Arch

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - A new single-error correction scheme based on self-diagnosis residue number arithmetic

✍ Yangyang Tang, ; Boutillon, Emmanuel; Jego, Christophe; Jezequel, Michel 📂 Article 📅 2010 🏛 IEEE ⚖ 268 KB

[IEEE 2010 Conference on Design and Arch

[IEEE 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - Edinburgh, United Kingdom (2010.10.26-2010.10.28)] 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP) - A flexible implementation of a Global Navigation Satellite System (GNSS) receiver for on-board satellite navigation

✍ Dion, A.; Boutillon, E.; Calmettes, V.; Liegon, E. 📂 Article 📅 2010 🏛 IEEE ⚖ 494 KB