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[IEEE 2009 IEEE 15th International Symposium on High Performance Computer Architecture (HPCA) - Raleigh, NC, USA (2009.02.14-2009.02.18)] 2009 IEEE 15th International Symposium on High Performance Computer Architecture - Prediction router: Yet another low latency on-chip router architecture

✍ Scribed by Matsutani, Hiroki; Koibuchi, Michihiro; Amano, Hideharu; Yoshinaga, Tsutomu

Book ID: 126627395
Publisher: IEEE
Year: 2009
Weight: 683 KB
Category: Article
ISBN: 1424429323
DOI: 10.1109/HPCA.2009.4798274

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