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[IEEE 2009 Design, Automation & Test in Europe Conference & Exhibition (DATE'09) - Nice (2009.04.20-2009.04.24)] 2009 Design, Automation & Test in Europe Conference & Exhibition - Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints

✍ Scribed by Ludovici, D.; Gilabert, F.; Medardoni, S.; Gomez, C.; Gomez, M.E.; Lopez, P.; Gaydadjiev, G.N.; Bertozzi, D.

Book ID: 121188223
Publisher: IEEE
Year: 2009
Weight: 142 KB
Category: Article
ISBN: 3981080157
DOI: 10.1109/DATE.2009.5090727

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