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[IEEE 2008 11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS) - Bratislava, Slovakia (2008.04.16-2008.04.18)] 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems - Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration

✍ Scribed by Starecek, Lukas; Sekanina, Lukas; Kotasek, Zdenek

Book ID: 126616580
Publisher: IEEE
Year: 2008
Weight: 433 KB
Category: Article
ISBN: 1424422760
DOI: 10.1109/DDECS.2008.4538796

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