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[IEEE 2007 IFIP International Conference on Very Large Scale Integration - Atlanta, GA, USA (2007.10.15-2007.10.17)] 2007 IFIP International Conference on Very Large Scale Integration - A minimum-latency block-serial architecture of a decoder for IEEE 802.11n LDPC codes

✍ Scribed by Rovini, Massimo; Gentile, Giuseppe; Rossi, Francesco; Fanucci, Luca

Book ID: 121831527
Publisher: IEEE
Year: 2007
Weight: 189 KB
Category: Article
ISBN: 1424417104
DOI: 10.1109/VLSISOC.2007.4402504

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