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[IEEE 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - San Francisco, CA, USA (2007.02.11-2007.02.15)] 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers - A Dual-Supply 0.2-to-4GHz PLL Clock Multiplier in a 65nm Dual-Oxide CMOS Process

✍ Scribed by Desai, Shaishav; Trivedi, Pradeep; von Kanael, Vincent

Book ID: 120278874
Publisher: IEEE
Year: 2007
Weight: 613 KB
Category: Article
ISBN-13: 9781424408535
DOI: 10.1109/ISSCC.2007.373417

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