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[IEEE 2005 European Conference on Circuit Theory and Design, 2005. - Cork, Ireland (29th August - 1st September 2005)] Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005. - Optimization of bit-per-stage for low-voltage low-power CMOS pipeline ADCs

✍ Scribed by Adeniran, O.A.; Demosthenous, A.

Book ID: 124066973
Publisher: IEEE
Year: 2005
Tongue: English
Weight: 295 KB
Volume: 2
Category: Article
ISBN-13: 9780780390669
DOI: 10.1109/ECCTD.2005.1522991

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