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[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - A low-voltage sinc/sup 2/ decimator implemented by a new circuit technique using floating-gate MOS transistors

✍ Scribed by Hovin, M.; Wisland, D.; Berg, Y.; Lande, T.S.

Book ID: 126735143
Publisher: IEEE
Year: 2002
Weight: 403 KB
Volume: 5
Category: Article
ISBN-13: 9780780374485
DOI: 10.1109/ISCAS.2002.1010724

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