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[IEEE 1998 Symposium on VLSI Circuits Digest of Technical Papers - Honolulu, HI, USA (11-13 June 1998)] 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.98CH36215) - A novel powering-down scheme for low Vt CMOS circuits

✍ Scribed by Kumagai, K.; Iwaki, H.; Yoshida, H.; Suzuki, H.; Yamada, T.; Kurosawa, S.

Book ID: 126705329
Publisher: IEEE
Year: 1998
Weight: 257 KB
Category: Article
ISBN-13: 9780780347663
DOI: 10.1109/VLSIC.1998.687998

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