✦ LIBER ✦
High speed interconnect through device optimization for subthreshold FPGA
✍ Scribed by S.D. Pable; Mohd. Hasan
- Publisher
- Elsevier Science
- Year
- 2011
- Tongue
- English
- Weight
- 727 KB
- Volume
- 42
- Category
- Article
- ISSN
- 0026-2692
No coin nor oath required. For personal study only.