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๐Ÿ“

High-Speed Clock Network Design

โœ Scribed by Qing K. Zhu (auth.)


Publisher
Springer US
Year
2003
Tongue
English
Leaves
190
Edition
1
Category
Library

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โœฆ Synopsis


High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters.

โœฆ Table of Contents


Front Matter....Pages i-vii
Introduction....Pages 1-22
Overview to Timing Constraints....Pages 23-40
Sequential Clocked Elements....Pages 41-56
Design Methodology for Domino Circuits....Pages 57-73
Clock Generation and De-skewing....Pages 75-88
Microprocessor Clock Distribution Examples....Pages 89-107
Clock Network Simulation Methods....Pages 109-124
Low-Voltage Swing Clock Distribution....Pages 125-134
Routing Clock On Package....Pages 135-146
Balanced Clock Routing Algorithms....Pages 147-161
Clock Tree Design Flow in ASIC....Pages 163-170
Back Matter....Pages 171-187

โœฆ Subjects


Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design


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