✦ LIBER ✦

High performance real-time neural scheduler for ATM switches

✍ Scribed by Pousada-Carballo, J.M.; Gonzalez-Castano, F.J.; Rodriguez-Hernandez, P.S.; Garcia-Palomares, U.M.

Book ID: 117878666
Publisher: IEEE
Year: 2000
Tongue: English
Weight: 66 KB
Volume: 4
Category: Article
ISSN: 1089-7798
DOI: 10.1109/4234.892206

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Parallel iterative matching-based cell s

Parallel iterative matching-based cell scheduling algorithm for high-performance ATM switches

✍ Young-Keun Park; Young-Keun Lee 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 363 KB

An efficient ATM cell scheduling scheme

An efficient ATM cell scheduling scheme for improving real-time ATM services

✍ Young-Keun Park; Yong-Jae Kim 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 427 KB

RAZAN: a high-performance switch archite

RAZAN: a high-performance switch architecture for ATM networks

✍ Mostafa Abd-El-Barr; Khalid Al-Tawil; Habib Youssef; Talha Al-Jarad 📂 Article 📅 1998 🏛 John Wiley and Sons 🌐 English ⚖ 213 KB 👁 2 views

In this paper a high-performance packet switch architecture based on the improved logical neighbourhood (ILN) interconnection network, called RAZAN, is presented. RAZAN is an N × N multistage interconnection network (MIN) which consists of n stages, where n = log 2 N, of switching elements. Each sta

An efficient network-switch scheduling f

An efficient network-switch scheduling for real-time applications

✍ Caimu Tang; Chronopoulos, A.T.; Yaprak, E. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 149 KB

Optimal queueing discipline for real-tim

Optimal queueing discipline for real-time traffic at ATM switching nodes

✍ Saito, H. 📂 Article 📅 1990 🏛 IEEE 🌐 English ⚖ 541 KB

A high-performance input access scheme f

A high-performance input access scheme for ATM multicast switching

✍ Yieh R. Haung; Maria C. Yuang 📂 Article 📅 1996 🏛 Springer US 🌐 English ⚖ 588 KB