High Performance Memory Systems

✍ Scribed by Haldun Hadimioglu, David Kaeli, Jeffrey Kuskin, Ashwini Nanda, Josep Torrellas (auth.), Haldun Hadimioglu, Jeffrey Kuskin, Josep Torrellas, David Kaeli, Ashwini Nanda (eds.)

• Publisher: Springer-Verlag New York
• Year: 2004
• Tongue: English
• Leaves: 297
• Edition: 1
• Category: Library

✦ Synopsis

Today, the more rapid rate of speed increase in microprocessor technology than in memory has created a serious memory gap (or "wall") for computer designers and manufacturers.

Edited by leading international authorities in the field, High Performance Memory Systems surveys advances in technology, architecture, and algorithms that address both scalability needs in multiprocessors and the expanding gap between CPU/network and memory speeds. The range of approaches described here address issues present on uni-processor systems as well as on multi-processor systems. Current research highlights from both industry and academia focus on: coherence, synchronization, and allocation; power-awareness, reliability, and reconfigurability; software-based memory tuning; architecture design issues; and workload considerations.

Topics and features:

* Describes leading-edge research relevant to the growing disparity between CPU and memory speed

* Provides theoretical and practical approaches to the memory-wall problem, including some from recent worldwide symposiums on the topic

* Includes specific solutions to common problems in different operating environments

* Offers a broad overview of high performance memory systems, as well as in-depth discussions of select, essential areas

* Includes a concise, thorough introductory chapter about the field

This unique and comprehensive compendium assembles the work by leading researchers and professionals into aspects of improving the memory-system performance of general-purpose programs. It is ideally suited for researchers and R&D professionals with interests, or practice, in computer engineering, computer architecture, memory design, and general processor architecture.

✦ Table of Contents

Front Matter....Pages i-xii
Introduction to High-Performance Memory Systems....Pages 1-8
Front Matter....Pages 9-9
Speculative Locks: Concurrent Execution of Critical Sections in Shared-Memory Multiprocessors....Pages 11-24
Dynamic Verification of Cache Coherence Protocols....Pages 25-42
Timestamp-Based Selective Cache Allocation....Pages 43-59
Front Matter....Pages 61-61
Power-Efficient Cache Coherence....Pages 63-78
Improving Power Efficiency with an Asymmetric Set-Associative Cache....Pages 79-96
Memory Issues in Hardware-Supported Software Safety....Pages 97-112
Reconfigurable Memory Module in the RAMP System for Stream Processing....Pages 113-131
Front Matter....Pages 133-133
Performance of Memory Expansion Technology (MXT)....Pages 135-152
Profile-Tuned Heap Access....Pages 153-164
Array Merging: A Technique for Improving Cache and TLB Behavior....Pages 165-179
Software Logging under Speculative Parallelization....Pages 181-195
Front Matter....Pages 197-197
An Analysis of Scalar Memory Accesses in Embedded and Multimedia Systems....Pages 199-212
Bandwidth-Based Prefetching for Constant-Stride Arrays....Pages 213-225
Performance Potential of Effective Address Prediction of Load Instructions....Pages 227-246
Front Matter....Pages 247-247
Evaluating Novel Memory System Alternatives for Speculative Multithreaded Computer Systems....Pages 249-262
Evaluation of Large L3 Caches Using TPC-H Trace Samples....Pages 263-277
Exploiting Intelligent Memory for Database Workloads....Pages 279-292
Back Matter....Pages 293-297

✦ Subjects

Computer Systems Organization and Communication Networks; Processor Architectures; System Performance and Evaluation