High Performance Computing – HiPC 2005: 12th International Conference, Goa, India, December 18-21, 2005, Proceedings (Lecture Notes in Computer Science, 3769)

✍ Scribed by David A. Bader (editor), Manish Parashar (editor), V. Sridhar (editor), Viktor K. Prasanna (editor)

• Publisher: Springer
• Year: 2005
• Tongue: English
• Leaves: 576
• Category: Library

✦ Synopsis

This book constitutes the refereed proceedings of the 12th International Conference on High-Performance Computing, HiPC 2005, held in Goa, India in December 2005. The 50 revised full papers presented were carefully reviewed and selected from 362 submissions. After the keynote section and the presentation of the 2 awarded best contributions the papers are organized in topical sections on algorithms, applications, architecture, systems software, communication networks, and systems and networks.

✦ Table of Contents

Frontmatter
Keynote Addresses
Data Confidentiality in Collaborative Computing
Productivity in High Performance Computing
A New Approach to Programming and Prototyping Parallel Systems
The Changing Challenges of Collaborative Algorithmics
Quantum Physics and the Nature of Computation
Plenary Session - Best Papers
Preemption Adaptivity in Time-Published Queue-Based Spin Locks
Criticality Driven Energy Aware Speculation for Speculative Multithreaded Processors
Session I - Algorithms
Search-Optimized Suffix-Tree Storage for Biological Applications
Cost-Optimal Job Allocation Schemes for Bandwidth-Constrained Distributed Computing Systems
A Fault Recovery Scheme for P2P Metacomputers
A Distributed Location Identification Algorithm for Ad hoc Networks Using Computational Geometric Methods
A Symmetric Localization Algorithm for MANETs Based on Collapsing Coordinate Systems
Session II - Applications
Performance Study of LU Decomposition on the Programmable GPU
PENCAPS: A Parallel Application for Electrode Encased Grounding Systems Project
Application of Reduce Order Modeling to Time Parallelization
Orthogonal Decision Trees for Resource-Constrained Physiological Data Stream Monitoring Using Mobile Devices
Throughput Computing with Chip MultiThreading and Clusters
Session III - Architecture
Supporting MPI-2 One Sided Communication on Multi-rail InfiniBand Clusters: Design Challenges and Performance Benefits
High Performance RDMA Based All-to-All Broadcast for InfiniBand Clusters
Providing Full QoS Support in Clusters Using Only Two VCs at the Switches
Offloading Bloom Filter Operations to Network Processor for Parallel Query Processing in Cluster of Workstations
A High-Speed VLSI Array Architecture for Euclidean Metric-Based Hausdorff Distance Measures Between Images
Session IV - Applications
Sensor Selection Heuristic in Sensor Networks
Mobile Pipelines: Parallelizing Left-Looking Algorithms Using Navigational Programming
Distributed Point Rendering
An Intra-task DVS Algorithm Exploiting Program Path Locality for Real-Time Embedded Systems
Advanced Resource Management and Scheduling of Workflow Applications in JavaSymphony
Session V - Systems Software
Using Clustering to Address Heterogeneity and Dynamism in Parallel Scientific Applications
Data and Computation Abstractions for Dynamic and Irregular Computations
XCAT-C++: Design and Performance of a Distributed CCA Framework
The Impact of Noise on the Scaling of Collectives: A Theoretical Approach
Extensible Parallel Architectural Skeletons
Session VI - Communication Networks
An Efficient Distributed Algorithm for Finding Virtual Backbones in Wireless Ad-Hoc Networks
A Novel Battery Aware MAC Protocol for Minimizing {\itshape Energy} {\texttimes} {\itshape Latency} in Wireless Sensor Networks
On the Power Optimization and Throughput Performance of Multihop Wireless Network Architectures
A Novel Solution for Time Synchronization in Wireless Ad~Hoc and Sensor Networks
An Algorithm for Boundary Discovery in Wireless Sensor Networks
Session VII - Architecture
A Low-Complexity Issue Queue Design with Speculative Pre-execution
Performance and Power Evaluation of an Intelligently Adaptive Data Cache
Neural Confidence Estimation for More Accurate Value Prediction
The Potential of On-Chip Multiprocessing for QCD Machines
Low-Power 32bit{\texttimes}32bit Multiplier Design with Pipelined Block-Wise Shutdown
Session VIII - Communication Networks
Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System
Improved Point-to-Point and Collective Communication Performance with Output-Queued High-Radix Routers
A Clustering and Traffic-Redistribution Scheme for High-Performance IPsec VPNs
WDM Multistage Interconnection Networks Architectures for Enhancing Supernetworks Switching Infrastructure
Learning-TCP: A Novel Learning Automata Based Congestion Window Updating Mechanism for Ad~hoc Wireless Networks
Session IX - Algorithms
Design and Implementation of the HPCS Graph Analysis Benchmark on Symmetric Multiprocessors
Scheduling Multiple Flows on Parallel Disks
Snap-Stabilizing Detection of Cutsets
Scheduling Divisible Loads with Return Messages on Heterogeneous Master-Worker Platforms
Session X - Systems and Networks
A Grid Authentication System with Revocation Guarantees
Integrating a New Cluster Assignment and Scheduling Algorithm into an Experimental Retargetable Code Generation Framework
Cooperative Instruction Scheduling with Linear Scan Register Allocation
iSCSI Analysis System and Performance Improvement of iSCSI Sequential Access in High Latency Networks
Backmatter