High-Bandwidth Memory Interface

✍ Scribed by Chulwoo Kim, Hyun-Woo Lee, Junyoung Song (auth.)

Publisher: Springer International Publishing
Year: 2014
Tongue: English
Leaves: 94
Series: SpringerBriefs in Electrical and Computer Engineering
Edition: 1
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.

✦ Table of Contents

Front Matter....Pages i-viii
An Introduction to High-Speed DRAM....Pages 1-11
An I/O Line Configuration and Organization of DRAM....Pages 13-24
Clock Generation and Distribution....Pages 25-49
Transceiver Design....Pages 51-76
TSV Interface for DRAM....Pages 77-86
Back Matter....Pages 87-88

✦ Subjects

Circuits and Systems;Electronic Circuits and Devices;Electronics and Microelectronics, Instrumentation

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