𝔖 Bobbio Scriptorium

✦ LIBER ✦

Hierarchical system for layout design and checking : Roman Jelonek. Electron Technol., Warsaw17(1/2), 89 (1984)

Book ID: 103279182
Publisher: Elsevier Science
Year: 1986
Tongue: English
Weight: 135 KB
Volume: 26
Category: Article
ISSN: 0026-2714
DOI: 10.1016/0026-2714(86)90888-7

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

The local checking of design rules for I

The local checking of design rules for IC layouts described hierarchically : Lech Matuszewski. Electron Technol., Warsaw17(1/2), 77 (1984)

📂 Article 📅 1986 🏛 Elsevier Science 🌐 English ⚖ 126 KB

A simple but effective method of electri

A simple but effective method of electrical connections checking of IC layout and its implementation : Janusz Galenski. Electron Technol., Warsaw17 (1/2), 71 (1984)

📂 Article 📅 1986 🏛 Elsevier Science 🌐 English ⚖ 132 KB