Hardware/software tradeoffs for IP-over-ATM frame reassembly in an integrated architecture
✍ Scribed by P.M Ewert; N Manjikian
- Publisher
- Elsevier Science
- Year
- 2001
- Tongue
- English
- Weight
- 275 KB
- Volume
- 24
- Category
- Article
- ISSN
- 0140-3664
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✦ Synopsis
This paper investigates hardware/software implementation tradeoffs in the reassembly of cells for IP-over-ATM on an integrated architecture combining processing, memory, and embedded direct-memory-access (DMA) engines for the sources and sinks of communication traf®c. Two approaches are considered. In the ®rst approach, CRC computation is performed in software. In the second approach, CRC computation is of¯oaded to a specialized module embedded in one of the DMA engines. The two alternatives are evaluated through simulated execution of representative control software with detailed modeling of cache/memory effects and bus contention. The results indicate that the software CRC approach can support OC-3 rates with a 333 MHz processor, and the hardware CRC approach can support OC-3 rates with a 71 MHz processor and OC-12 rates with a 333 MHz processor.