Guard change: what the new Z280 can actually do: Elektron. Prax. (Germany), vol. 22, no. 6, pp.34–36, 41–42 (June 1987). In German
- Publisher
- Elsevier Science
- Year
- 1988
- Tongue
- English
- Weight
- 130 KB
- Volume
- 19
- Category
- Article
- ISSN
- 0026-2692
No coin nor oath required. For personal study only.
✦ Synopsis
A 32-b LISP processor has been integrated onto a I cm • 1 cm chip in a 1.25 lam DLM CMOS process. The chip contains 553687 transistors including 6 RAMs totaling 114-Kb, has 224 pins, and is packaged in a custom pin grid array. The processor implements a microcoded architecture compatible with an earlier LISP design. Microcode is contained in up to 32K X 64 b of external vMtable control store. The execution unit consists primarily of an ALU and 32-b barrel shifter/ masker. Booth's algorithm allows a 2 X 32-b multiply microinstruction. A IK • 32-b RAM (A-memory) provides one source for the execution unit. The PDL memory stores the top IK words of stack on chip, eliminating virtual memory references otherwise required to access these variables or store them during function cells. Separate adders compute effective addresses for common macroinstruction addressing modes using virtual memory and the on-chip stack. Dispatch memory contains branch tables that allow an up-to-128-way microinstruction branch to run as quickly as a simple jump. A macroinstruction prefetch unit prefetches up to four 16-b macroinstructions ahead, and statically follows branches. (2 refs.)