Parallel generation of random numbers on distributed memory multiprocessors is discussed. Conditions required for such a generator are enumerated, and a method based on a shift register sequence of random numbers is shown to satisfy all of these conditions. The method distributes to processors nonov
Generation of shift register random numbers on vector processors
โ Scribed by Jun Makino; Osamu Miyamura
- Publisher
- Elsevier Science
- Year
- 1991
- Tongue
- English
- Weight
- 508 KB
- Volume
- 64
- Category
- Article
- ISSN
- 0010-4655
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โฆ Synopsis
An efficient method to utilize the shift register pseudorandom numbers on vector processors is described. The generator can be used inline in a FORTRAN program, so that high performance is guaranteed for the total code. It is shown that the generator can treat two different types of configurations in which a single sequence of the shift register random numbers is arranged into a two dimensional array. Thus one can choose an appropriate configuration according to the randomness required for one's computation. Preceding the random vector generation, all components of initial vectors for the vectorial recurrence must be given proper values. A simple initialization procedure is given which makes full use of the squaring property of polynomials over GF(2). It is vectorizable and quite efficient, and it can be applied for both types of configurations.
๐ SIMILAR VOLUMES
In this paper. it is shown that the problem of generalized-minimum-distance (GMD) decoding of Reed-Solomon (RS) codes can be reduced to the problem of multisequence shift register synthesis, and a simple algorithm is presented that yields a solution for this problem by finding, for \(k=1,2, \ldots\)