Generation, modeling, and analysis of CCII-based gyrators using the generalized symbolic framework for linear active circuits
✍ Scribed by Ramy A. Saad; Ahmed M. Soliman
- Publisher
- John Wiley and Sons
- Year
- 2008
- Tongue
- English
- Weight
- 220 KB
- Volume
- 36
- Category
- Article
- ISSN
- 0098-9886
- DOI
- 10.1002/cta.432
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✦ Synopsis
Abstract
In this paper, CCII‐based gyrators are synthesized, modeled, and analyzed using the generalized symbolic framework for linear active circuits. The systematic synthesis method using admittance matrix expansion, included in the framework, is applied to generate optimized nullor–mirror descriptions for the gyrator. The resulting CCII‐based circuit representations for the gyrators, obtained from mapping nullor–mirror pairs in the ideal realizations with equivalent second‐generation current conveyors (CCIIs), can be classified into two topologies according to the type of the CCII terminals handling the gyrator input and output signals. In topology I, the gyrator input and output terminals are CCIIs Y–Z‐terminals, whereas in topology II, the gyrator input and output terminals are CCIIs X‐terminals. The parasitic components within the synthesized circuits, associated with the actual CCIIs, are modeled and included in their expanded admittance matrices. Exact non‐ideal analysis for two circuits belonging to the two topologies, involving the reduction of their expanded admittance matrices to port admittance matrices, is then carried out to investigate the practical functional performance for these circuits at their ports. The non‐ideal performance analysis based on the CCII actual parasitic elements indicates that, from a practical perspective, the CCII‐based gyrator circuits belonging to topology I are more efficient and suitable for the gyrator applications than those belonging to topology II in terms of bandwidth and operation at high frequencies. SPICE simulations are included to demonstrate the analytical results for the comparison between the practical performances of the two circuit topologies. Copyright © 2007 John Wiley & Sons, Ltd.