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Fully integrated CMOS phase-locked loop with 15 to 240 MHz locking range and ±50 ps jitter

✍ Scribed by Novof, I.I.; Austin, J.; Kelkar, R.; Strayer, D.; Wyatt, S.

Book ID: 119774433
Publisher: IEEE
Year: 1995
Tongue: English
Weight: 874 KB
Volume: 30
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.475714

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