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From APE to APE-100: From 1 to 100 gflops in lattice gauge theory simulations

✍ Scribed by N. Avico; P. Bacilieri; S. Cabasino; N. Cabibbo; L.A. Fernández; G. Fiorentini; A. Lai; M.P. Lombardo; E. Marinari; F. Marzano; P. Paolucci; G. Parisi; J. Pech; F. Rapuano; E. Remiddi; R. Sarno; G. Salina; A. Tarancón; G.M. Todesco; M. Torelli; R. Tripiccione; W. Tross


Publisher
Elsevier Science
Year
1989
Tongue
English
Weight
402 KB
Volume
57
Category
Article
ISSN
0010-4655

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✦ Synopsis


We briefly describe the APE processor, a parallel computer currently used in lattice gauge simulations. We also present in greater details the architecture and the implementation of APE-100, a fine grained SIMD processor for lattice gauge theory simulations, similar in structure to APE and designed to provide floating-point performances in the 100 Gflops range.