FPGA realization of FIR filters for high-speed and medium-speed by using modified distributed arithmetic architectures

✍ Scribed by Jiafeng Xie; Jianjun He; Guanzheng Tan

• Publisher: Elsevier Science
• Year: 2010
• Tongue: English
• Weight: 742 KB
• Volume: 41
• Category: Article
• ISSN: 0026-2692
• DOI: 10.1016/j.mejo.2010.04.006