FPGA Design: Best Practices for Team-based Reuse

✍ Scribed by Philip Andrew Simpson (auth.)

• Publisher: Springer International Publishing
• Year: 2015
• Tongue: English
• Leaves: 260
• Edition: 2
• Category: Library

✦ Synopsis

This book describes best practices for successful FPGA design. It is the result of the author’s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed.

This book’s content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams.

Coverage includes the complete FPGA design flow, from the basics to advanced techniques. This new edition has been enhanced to include new sections on System modeling, embedded design and high level design. The original sections on Design Environment, RTL design and timing closure have all been expanded to include more up to date techniques as well as providing more extensive scripts and RTL code that can be reused by readers.

• Presents complete, field-tested methodology for FPGA design, focused on reuse across design teams;
• Offers best practices for FPGA timing closure, in-system debug, and board design;
• Details techniques to resolve common pitfalls in designing with FPGAs.

✦ Table of Contents

Front Matter....Pages i-xi
Introduction....Pages 1-4
Project Management....Pages 5-7
Design Specification....Pages 9-13
System Modeling....Pages 15-28
Resource Scoping....Pages 29-38
Design Environment....Pages 39-51
Board Design....Pages 53-65
Power and Thermal Analysis....Pages 67-77
Team Based Design Flow....Pages 79-89
RTL Design....Pages 91-139
IP and Design Reuse....Pages 141-155
Embedded Design....Pages 157-178
Functional Verification....Pages 179-190
Timing Closure....Pages 191-226
High Level Design....Pages 227-236
In-System Debug....Pages 237-253
Design Sign-off....Pages 255-256
Back Matter....Pages 257-257

✦ Subjects

Circuits and Systems; Processor Architectures; Electronics and Microelectronics, Instrumentation