✦ LIBER ✦
FPGA-based SAT solver architecture with near-zero synthesis and layout overhead
✍ Scribed by Zhong, P.; Martonosi, M.; Ashar, P.
- Book ID
- 114448423
- Publisher
- The Institution of Electrical Engineers
- Year
- 2000
- Tongue
- English
- Weight
- 178 KB
- Volume
- 147
- Category
- Article
- ISSN
- 1350-2387
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