Features of a Scan and Clock Resource chip for providing access to board-level test functions
✍ Scribed by Bulent I. Dervisoglu
- Publisher
- Springer US
- Year
- 1991
- Tongue
- English
- Weight
- 788 KB
- Volume
- 2
- Category
- Article
- ISSN
- 0923-8174
No coin nor oath required. For personal study only.
✦ Synopsis
The architecture and some of the specific features of a Scan and Clock Resource (SCR) chip are described. This chip is currently being used in a high-end workstation product to provide access to the testability features of the individual chips and/or printed circuit boards. Using a board-level controller to gain access to the testability features of system components and interfacing the controller to a diagnostics processor (or external tester) is emerging as a common strategy for designing testable digital systems. Based upon experience gained from such an application, controller features that are deemed useful are discussed.