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False Lock and Bifurcation in the Phase Locked Loop

โœ Scribed by Stensby, John

Book ID
118194663
Publisher
Society for Industrial and Applied Mathematics
Year
1987
Tongue
English
Weight
802 KB
Volume
47
Category
Article
ISSN
0036-1399

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a b s t r a c t Transmission and switching in digital telecommunication networks require distribution of precise time signals among the nodes. Commercial systems usually adopt a master-slave (MS) clock distribution strategy building slave nodes with phase-locked loop (PLL) circuits. PLLs are respons