Fabrication and evaluation of complementary logic circuits using zinc oxide and pentacene thin film transistor

Evaluation of trap states at front and b

Evaluation of trap states at front and back oxide interfaces and grain boundaries using electrical characteristic analysis and device simulation of polycrystalline silicon thin-film transistors

✍ Mutsumi Kimura 📂 Article 📅 2005 🏛 John Wiley and Sons 🌐 English ⚖ 756 KB

## Abstract The trap states at the front and back oxide interfaces and grain boundaries of polycrystalline silicon thin‐film transistors are evaluated by using electrical characteristic analysis and device simulation. First, the method for extracting the trap densities of the front and back oxide i