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Experimental 0.25-μm-gate fully depleted CMOS/SIMOX process using a new two-step LOCOS isolation technique

✍ Scribed by Ohno, T.; Kado, Y.; Harada, M.; Tsuchiya, T.


Book ID
114536138
Publisher
IEEE
Year
1995
Tongue
English
Weight
648 KB
Volume
42
Category
Article
ISSN
0018-9383

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