Engineering Approach to CMOS-Logic Optimization Allowing for Internal Capacitances and On-Chip Interconnections

✍ Scribed by A. V. Butuzov; G. V. Kristovskii

• Book ID: 106523809
• Publisher: Springer
• Year: 2005
• Tongue: English
• Weight: 99 KB
• Volume: 34
• Category: Article
• ISSN: 1063-7397
• DOI: 10.1007/s11180-005-0044-1