Content: Computer-Aided Design for the Energy Optimization in the Memory Architecture of Embedded Systems, Florin Balasa and Dhiraj K. Pradhan Introduction Low-Power Design for Embedded Systems The Role of On-Chip Memories Optimization of the Energy Consumption of the Memory Subsystem The Goal and Organization of the Book The Power of Polyhedra, Doran K. Wilde Introduction Polyhedra Representation of Polyhedra in a Computer Description of Operations Loop Nest Synthesis Using Polyhedral Operations Localizing Affine Dependences Computation of Data Storage Requirements for Affine Algorithmic Specifications, Florin Balasa, Hongwei Zhu, and Ilie I. Luican Introduction The Memory Size Computation Problem: A Brief Overview Computation of the Minimum Data Storage for Affine Specifications Operations with Linearly Bounded Lattices Computation of the Minimum Data Storage Experimental Results Conclusions Polyhedral Techniques for Parametric Memory Requirement Estimation, Philippe Clauss, Diego Garbervetsky, Vincent Loechner, and Sven Verdoolaege Introduction The Polyhedral Model of Loop Nests Counting the Elements in a Polyhedral Set Memory Requirement Estimates Based on Maximization Problems Conclusion Storage Allocation for Streaming-Based Register File, Praveen Raghavan and Francky Catthoor Stream Register File: Why and How Model for Compilation on Stream Register File SARA: StreAm-Register-Allocation-Based Compilation Conclusion Optimization of the Dynamic Energy Consumption and Signal Mapping in Hierarchical Memory Organizations, Florin Balasa, Ilie I. Luican, Hongwei Zhu, and Doru V. Nasui Introduction Energy-Aware Signal Assignment to the Memory Layers Signal-to-Memory Mapping Techniques The Signal-to-Memory Mapping Model Experimental Results Conclusions Leakage Current Mechanisms and Estimation in Memories and Logic, Ashoka Sathanur, Praveen Raghavan, Stefan Cosemans, and Wim Dahaene Introduction Leakage Current Mechanisms Power Breakdown in SoCs Leakage Current Modeling and Estimation Leakage Control in SoCs, Praveen Raghavan, Ashoka Sathanur, Stefan Cosemans, and Wim Dahaene Leakage Power Reduction Techniques Leakage Power Reduction Techniques Applied to SRAM Memories Leakage Power Reduction Using Low Power EDA Flows Compiler-Driven Leakage Power Reduction Energy-Efficient Memory Port Assignment, Preeti Ranjan Panda and Lakshmikantam Chitturi Introduction Background Illustrative Examples Memory Energy-Aware Synthesis Experiments Conclusion Energy-Efficient Address-Generation Units and Their Design Methodology, Ittetsu Taniguchi, Guillermo Talavera, and Francky Catthoor Introduction Motivation behind Exploration of AGUs Reconfigurable AGU: What Do We Execute the Calculations on? Architecture Exploration Problem: What Is the Optimal Solution? AGU Mapping Framework: How Is the Address Calculation Mapped on the AGU Model? AGU Exploration Framework: How Are Pareto Solutions Obtained from the Solution Space? Experimental Results Conclusion and Future Work Exercises Index References appear at the end of each chapter.