Embedded system design: embedded systems foundations of cyber-physical systems

✍ Scribed by Marwedel, Peter

• Publisher: Springer
• Year: 2011
• Tongue: English
• Leaves: 400
• Series: Embedded systems (Springer (Firm))
• Edition: 2nd ed
• Category: Library

✦ Synopsis

Specifications and Modeling; Embedded System Hardware; System Software; Evaluation and Validation; Application mapping; Optimization; Test; Integer linear programming; Kirchhoff's laws and operational amplifiers.;Until the late 1980s, information processing was associated with large mainframe computers and huge tape drives. During the 1990s, this trend shifted toward information processing with personal computers, or PCs. The trend toward miniaturization continues and in the future the majority of information processing systems will be small mobile computers, many of which will be embedded into larger products and interfaced to the physical environment. Hence, these kinds of systems are called embedded systems. Embedded systems together with their physical environment are called cyber-physical systems.

✦ Table of Contents

Fault coverage......Page 4
Signature analysis......Page 9
OSEK/VDX COM......Page 19
Cover......Page 1
Preface......Page 10
Assignments......Page 12
Memory-architecture aware compilation......Page 17
Assignments......Page 18
References......Page 8
Introduction......Page 15
Energy-aware compilation......Page 16
Acknowledgments......Page 20
OpenMP......Page 22
Design Flows......Page 32
Reconfigurable Logic......Page 34
Electrical robustness......Page 41
Guaranteeing real-time behavior......Page 42
Examples......Page 44
D/A-converters......Page 46
Models of computation......Page 47
Condition/event nets......Page 50
Place/transition nets......Page 51
Predicate/transition nets......Page 56
Communicating finite state machines (CFSMs)......Page 58
VHDL......Page 60
SystemC......Page 76
Verilog and SystemVerilog......Page 78
Scope......Page 80
Kahn process networks......Page 81
ADA......Page 82
Simulink......Page 85
Introduction......Page 86
Levels of hardware modeling......Page 87
Condition/event nets......Page 89
UML......Page 93
Predicate/transition nets......Page 95
Assignments......Page 96
Test pattern generation for gate level models......Page 2
Contents......Page 5
Aperiodic scheduling with precedence constraints......Page 14
Structure of this book......Page 37
Communication......Page 39
Requirements......Page 40
Sampling theorem......Page 49
Use cases......Page 54
(Message) Sequence Charts......Page 55
Fault injection......Page 6
Application areas and examples......Page 21
Periodic scheduling without precedence constraints......Page 23
Common characteristics......Page 24
Assignments......Page 25
The built-in logic block observer (BILBO)......Page 11
Reconciling compilers and timing analysis......Page 26
Rapid prototyping and emulation......Page 27
Introduction......Page 29
Compilation for VLIW processors......Page 31
Compilation for digital signal processors......Page 28
Challenges in Embedded System Design......Page 30
Assignments......Page 38
Assignments......Page 43
Scan design......Page 7
Array folding......Page 13
Dynamic voltage scaling (DVS)......Page 33
Kirchhoff's laws and operational amplifiers......Page 3
Index......Page 45
Timed automata......Page 59
StateCharts: implicit shared memory communication......Page 61
Synchronous languages......Page 71
SDL: A case of message passing......Page 73
Synchronous data flow......Page 83
Place/transition nets......Page 90
Evaluation......Page 97
VHDL......Page 99
SystemC......Page 115
Verilog and SystemVerilog......Page 117
SpecC......Page 119
Von-Neumann languages......Page 120
ADA......Page 121
Java......Page 124
Pearl and Chill......Page 125
Levels of hardware modeling......Page 126
Criteria......Page 128
UML......Page 132
Ptolemy II......Page 134
Assignments......Page 135
Introduction......Page 138
Sensors......Page 139
Discretization of time: Sample-and-hold circuits......Page 142
Discretization of values: A/D-converters......Page 146
Overview......Page 151
Application-Specific Circuits (ASICs)......Page 154
Reconfigurable Logic......Page 171
Memories......Page 174
Communication......Page 176
Requirements......Page 177
Electrical robustness......Page 178
Guaranteeing real-time behavior......Page 179
Examples......Page 181
D/A-converters......Page 183
Sampling theorem......Page 186
Actuators......Page 191
Secure hardware......Page 192
System Software......Page 195
General requirements......Page 196
Real-time operating systems......Page 200
Resource access protocols......Page 204
ERIKA......Page 209
OSEK/VDX COM......Page 213
CORBA......Page 214
MPI......Page 215
POSIX Threads (Pthreads)......Page 216
UPnP, DPWS and JXTA......Page 217
Real-time databases......Page 218
Assignments......Page 219
Scope......Page 220
Multi-objective optimization......Page 221
Relevant objectives......Page 223
Early phases......Page 224
WCET estimation......Page 225
Real-time calculus......Page 230
Energy and power models......Page 234
Thermal models......Page 235
Risk- and dependability analysis......Page 236
Simulation......Page 245
Rapid prototyping and emulation......Page 246
Formal Verification......Page 248
Assignments......Page 250
Problem definition......Page 252
Classification of scheduling algorithms......Page 255
Aperiodic scheduling without precedence constraints......Page 259
Aperiodic scheduling with precedence constraints......Page 265
Periodic scheduling without precedence constraints......Page 274
Periodic scheduling with precedence constraints......Page 279
Sporadic events......Page 280
COOL......Page 281
Mapping to heterogeneous multi-processors......Page 289
Assignments......Page 294
Task level concurrency management......Page 297
Floating-point to fixed-point conversion......Page 301
Simple loop transformations......Page 303
Loop tiling/blocking......Page 305
Loop splitting......Page 307
Array folding......Page 309
Introduction......Page 311
Energy-aware compilation......Page 312
Memory-architecture aware compilation......Page 313
Reconciling compilers and timing analysis......Page 322
Compilation for digital signal processors......Page 324
Compilation for multimedia processors......Page 326
Compilation for VLIW processors......Page 327
Compilation for network processors......Page 328
Compiler generation, retargetable compilers and design space exploration......Page 329
Dynamic power management (DPM)......Page 333
Assignments......Page 334
Scope......Page 337
Test pattern generation for gate level models......Page 338
Fault coverage......Page 340
Fault simulation......Page 341
Fault injection......Page 342
Scan design......Page 343
Signature analysis......Page 345
Pseudo-random test pattern generation......Page 346
The built-in logic block observer (BILBO)......Page 347
Assignments......Page 348
Integer linear programming......Page 350
Kirchhoff's laws and operational amplifiers......Page 352
References......Page 357
About the Author......Page 386
List of Figures......Page 387
Index......Page 394