Title
Embedded System Design, THIRD EDITION
Copyright
Dedication
Contents
Preface
Preface to the First Edition
Acknowledgements
1. Introduction
1.1 Features of Embedded Systems
1.2 Design Metrics
1.3 Embedded System Design Flow
1.4 Conclusion
Exercises
2. ARM: An Advanced Microcontroller
2.1 ARM Microcontroller
2.2 A Brief History
2.3 Structure of ARM7
2.3.1 Control and Status Signals in ARM7
2.4 ARM Pipeline
2.4.1 3-stage Pipeline
2.4.2 5-stage Pipeline
2.4.3 6-stage Pipeline
2.4.4 8-stage Pipeline
2.5 Instruction Set Architecture (ISA
2.5.1 Registers
2.5.2 Data Processing Instructions
2.5.3 Data Transfer Instructions
2.5.4 Multiplication Instructions
2.5.5 Software Interrupt
2.5.6 Conditional Execution
2.5.7 Branch Instruction
2.5.8 Swap Instruction
2.5.9 Modifying Status Registers
2.6 THUMB Instructions
2.7 Exceptions in ARM
2.8 Programming Examples
2.8.1 Finding the Maximum of a Set of Numbers
2.8.2 Comparing Two Null-terminated Strings
2.9 Conclusion
Exercises
3. Digital Signal Processors
3.1 Architecture of Digital Signal Processors
3.2 High-speed Data Access
3.2.1 Memory Architecture Design
3.2.2 Address Generation Units and Special Addresing Modes
3.2.3 Direct Memory Access (DMA) Controllers
3.3 Fast Computation
3.3.1 Arithmetic Processing
3.3.2 Instruction Pipelining
3.3.3 Parallel Architectures
3.4 Higher Accuracy
3.5 Fast Execution Control
3.6 C6000 Family of DSPs
3.6.1 C6000 DSP Core
3.6.2 C6000 Pipeline
3.6.3 Software Pipelining
3.6.4 Software Pipelined Loop (SPLOOP) Buffer
3.7 Conclusion
Exercises
4. Field Programmable Gate Arrays
4.1 Field Programmable Devices
4.2 Programmability of FPGA
4.3 FPGA Logic Block Variations
4.4 FPGA Design Flow
4.5 Modern FPGAs
4.6 Conclusion
Exercises
5. Interfacing
5.1 Serial Peripheral Interface (SPI
5.2 Inter-Integrated Circuit (IIC, I2C
5.3 RS-232C
5.4 RS-422
5.5 RS-485
5.6 Universal Serial Bus (USB
5.6.1 Physical Interface
5.6.2 USB Connectors
5.7 Infrared Communication—IrDA
5.8 Controller Area Network—CAN
5.9 Bluetooth
5.10 Conclusion
Exercises
6. Sensors and Actuators
6.1 Sensors
6.1.1 Parameters of Sensors
6.1.2 Classification of Sensors
6.1.3 Linear and Rotational Sensors
6.2 Actuators
6.2.1 Classification of Actuators
6.3 Conclusion
Exercises
7. Real-time Operating System
7.1 Types of Real-time Tasks
7.1.1 Hard Real-time Tasks
7.1.2 Firm Real-time Tasks
7.1.3 Soft Real-time Tasks
7.2 Task Periodicity
7.2.1 Periodic Tasks
7.2.2 Sporadic Tasks
7.2.3 Aperiodic Tasks
7.3 Task Scheduling
7.4 Classification of Scheduling Algorithms
7.5 Clock Driven Scheduling
7.5.1 Table Driven Scheduling
7.5.2 Cyclic Scheduling
7.6 Event Driven Scheduling
7.6.1 Foreground–background Scheduling
7.6.2 Rate Monotonic Scheduling
7.6.3 Earliest Deadline First Scheduling
7.7 Resource Sharing
7.7.1 Priority Inheritance Protocol
7.8 Other Features of RTOS
7.9 Commercial RTOS
7.9.1 General Purpose Operating Systems—Real-time Extensions
7.9.2 Windows CE
7.9.3 LynxOS
7.9.4 VxWorks
7.9.5 Jbed
7.9.6 pSOS
7.10 Conclusion
Exercises
8. Specification Techniques
8.1 Introduction
8.2 StateChart
8.2.1 Modelling Hierarchy
8.3 Specification and Description Language (SDL
8.3.1 Signal Communication
8.3.2 Timer
8.4 Petri Nets
8.4.1 Basic Petri Nets
8.4.2 Properties of a Petri Net
8.4.3 Extensions to Petri Nets
8.4.4 Embedded System Modelling with Petri Nets
8.5 Unified Modelling Language (UML
8.5.1 Activity Diagram
8.5.2 Class Diagram
8.5.3 Communication/Collaboration Diagram
8.5.4 Component Diagram
8.5.5 Use Case Diagram
8.5.6 Sequence Diagram
8.5.7 Other Diagrams
8.5.8 UML Specification of an Elevator Control System
8.6 Conclusion
Exercises
9. Hardware–Software Cosimulation
9.1 Dimensions in Cosimulation
9.2 Cosimulation Approaches
9.3 A Typical Cosimulation Environment
9.3.1 Abstract-level Cosimulation
9.3.2 Detailed-level Cosimulation
9.3.3 Interface Issues
9.3.4 Automatic Interface Generation
9.4 Conclusion
Exercises
10. Hardware–Software Partitioning
10.1 Partitioning Using Integer Programming
10.2 Extended Kernighan-Lin Heuristic
10.2.1 The Kernighan-Lin Heuristic
10.2.2 Extending KL-Heuristic for Hardware–Software Partitioning
10.3 Partitioning Using Genetic Algorithm
10.4 Partitioning Using Particle Swarm Optimization (PSO
10.5 Extended Partitioning Problem
10.5.1 Binary Partitioning
10.5.2 Extended Partitioning
10.6 Power Aware Partitioning on Reconfigurable Hardware
10.6.1 Single Application Partitioning
10.6.2 Multiple Application Partitioning
10.7 Conclusion
Exercises
11. Functional Partitioning and Optimization
11.1 Functional Partitioning
11.1.1 Model
11.1.2 Partitioning Methodology
11.2 High-level Optimizations
11.2.1 Loop Optimizations
11.2.2 Floating to Fixed Point Conversion
11.3 Conclusion
Exercises
12. Security in Embedded Systems
12.1 Vulnerabilities
12.2 Security Requirements of Embedded Systems
12.3 Common Network Security Solutions
12.4 Design Challenges for Secure Embedded Systems
12.5 Security-Processing Architectures
12.6 Security Attacks
12.6.1 Logical Attacks
12.6.2 Physical and Side-Channel Attacks
12.7 Smart Card Security—A Case Study
12.7.1 Operating System and Logical Files
12.7.2 Attacks on Smart Card
12.8 Conclusion
Exercises
13. Low Power Embedded System Design
13.1 Sources of Power Dissipation
13.1.1 Dynamic Power Dissipation
13.1.2 Static Power Dissipation
13.2 Power Reduction Techniques
13.2.1 Algorithmic Power Minimization
13.2.2 Architectural Power Minimization
13.2.3 Logic and Circuit Level Power Minimization
13.2.4 Control Logic Power Minimization
13.3 System Level Power Management
13.3.1 Advanced Configuration and Power Interface (ACPI
13.4 Conclusion
Exercises
Bibliography
Index
Back cover