Embedded Computer Systems: Architectures, Modeling, and Simulation: 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005. Proceedings

✍ Scribed by Bob Iannucci (auth.), Timo D. Hämäläinen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis (eds.)

• Publisher: Springer-Verlag Berlin Heidelberg
• Year: 2005
• Tongue: English
• Leaves: 488
• Series: Lecture Notes in Computer Science 3553 : Theoretical Computer Science and General Issues
• Edition: 1
• Category: Library

✦ Synopsis

The SAMOS workshop is an international gathering of highly quali?ed researchers from academia and industry, sharing in a 3-day lively discussion on the quiet and - spiring northern mountainside of the Mediterranean island of Samos. As a tradition, the workshop features workshop presentations in the morning, while after lunch all kinds of informal discussions and nut-cracking gatherings take place. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved problems and in-depth topical reviews can be unleashed in the sci- ti?c arena. Consequently, the workshop provides the participants with an environment where collaboration rather than competition is fostered. The earlier workshops, SAMOS I–IV (2001–2004), were composed only of invited presentations. Due to increasing expressions of interest in the workshop, the Program Committee of SAMOS V decided to open the workshop for all submissions. As a result the SAMOS workshop gained an immediate popularity; a total of 114 submitted papers were received for evaluation. The papers came from 24 countries and regions: Austria (1), Belgium (2), Brazil (5), Canada (4), China (12), Cyprus (2), Czech Republic (1), Finland (15), France (6), Germany (8), Greece (5), Hong Kong (2), India (2), Iran (1), Korea (24), The Netherlands (7), Pakistan (1), Poland (2), Spain (2), Sweden (2), T- wan (1), Turkey (2), UK (2), and USA (5). We are grateful to all of the authors who submitted papers to the workshop.

✦ Table of Contents

Front Matter....Pages -
Platform Thinking in Embedded Systems....Pages 1-1
Interprocedural Optimization for Dynamic Hardware Configurations....Pages 2-11
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques....Pages 12-21
Reconfigurable Multiple Operation Array....Pages 22-31
RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration....Pages 32-40
Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping....Pages 41-50
Automatic FIR Filter Generation for FPGAs....Pages 51-61
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures....Pages 62-71
Configurable Computing for High-Security/High-Performance Ambient Systems....Pages 72-81
FPL-3E: Towards Language Support for Reconfigurable Packet Processing....Pages 82-92
Flux Caches: What Are They and Are They Useful?....Pages 93-102
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption....Pages 103-111
A Novel JAVA Processor for Embedded Devices....Pages 112-121
Formal Specification of a Protocol Processor....Pages 122-131
Tuning a Protocol Processor Architecture Towards DSP Operations....Pages 132-141
Observations on Power-Efficiency Trends in Mobile Communication Devices....Pages 142-151
CORDIC-Augmented Sandbridge Processor for Channel Equalization....Pages 152-161
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic....Pages 162-171
Exploiting Intra-function Correlation with the Global History Stack....Pages 172-181
Power Efficient Instruction Caches for Embedded Systems....Pages 182-191
Micro-architecture Performance Estimation by Formula....Pages 192-201
Offline Phase Analysis and Optimization for Multi-configuration Processors....Pages 202-211
Hardware Cost Estimation for Application-Specific Processor Design....Pages 212-221
Ultra Fast Cycle-Accurate Compiled Emulation of Inorder Pipelined Architectures....Pages 222-231
Generating Stream Based Code from Plain C....Pages 232-241
Fast Real-Time Job Selection with Resource Constraints Under Earliest Deadline First....Pages 242-250
A Programming Model for an Embedded Media Processing Architecture....Pages 251-261
Automatic ADL-Based Assembler Generation for ASIP Programming Support....Pages 262-268
Sandbridge Software Tools....Pages 269-278
A Hardware Accelerator for Controlling Access to Multiple-Unit Resources in Safety/Time-Critical Systems....Pages 279-288
Pattern Matching Acceleration for Network Intrusion Detection Systems....Pages 289-298
Real-Time Stereo Vision on a Reconfigurable System....Pages 299-307
Application of Very Fast Simulated Reannealing (VFSR) to Low Power Design....Pages 308-313
Compressed Swapping for NAND Flash Memory Based Embedded Systems....Pages 314-323
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms....Pages 324-333
A Scalable Embedded JPEG2000 Architecture....Pages 334-343
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design....Pages 344-353
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context....Pages 354-363
DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor....Pages 364-373
Modeling NoC Architectures by Means of Deterministic and Stochastic Petri Nets....Pages 374-383
High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks....Pages 384-393
The ODYSSEY Tool-Set for System-Level Synthesis of Object-Oriented Models....Pages 394-403
Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow....Pages 404-413
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms....Pages 414-423
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context....Pages 424-433
SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC....Pages 434-444
Moving Up to the Modeling Level for the Transformation of Data Structures in Embedded Multimedia Applications....Pages 445-454
A Case for Visualization-Integrated System-Level Design Space Exploration....Pages 455-464
Mixed Virtual/Real Prototypes for Incremental System Design – A Proof of Concept....Pages 465-474
Back Matter....Pages -

✦ Subjects

Computer Hardware; Processor Architectures; Computer Communication Networks; System Performance and Evaluation; Computer System Implementation