<p>This book intends to provide grounds for further research on electronic system level design (ESL), by means of open-source artifacts and tools, thereby stimulating the unconstrained deployment of new concepts, tools, and methodologies. It devises ESL design from the pragmatic perspective of a Sys
Electronic System Level Design: an Open-Source Approach
β Scribed by Rigo, Sandro(Editor);Azevedo, Rodolfo;Santos, Luiz
- Publisher
- Springer Science+Business Media B.V
- Year
- 2011
- Tongue
- English
- Leaves
- 151
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
Electronic System Level Design: an Open-Source Approachis based on the successful experience acquired with the conception of the ADL ArchC, the development of its underlying tool suite, and the building of its platform modeling infrastructure. With more than 10000 accesses per year since 2004, the dissemination of ArchC models reached not only students in quest of proper infrastructure to develop their research projects but also some companies in need of processor models to build virtual platforms using SystemC.
The need to anticipate the development of hardware-dependent software and to build virtual prototypes gave rise to Transaction Level Modeling (TLM). Since SystemC provided the elements and the adequate abstraction level for supporting TLM, their relation has grown so strong that OSCI created a TLM Working Group whose effort resulted in the recently released TLM 2.0 standard, which is also covered in this book.
β¦ Table of Contents
8.1.1 The Extended Design Flow......Page 2
8.2 Instrumentation of a SystemC Description......Page 4
8.3.1 Integration of Macromodels in PowerSC......Page 6
Contents......Page 7
Cover......Page 1
Electronic System Level Design......Page 3
Contributors......Page 8
Part I: System Design Representation......Page 9
1.2 Requirements of an ESL Representation......Page 11
Building PowerSC......Page 13
Building Lib2PSCLib......Page 14
1.3 ESL Design Flow......Page 12
Preface......Page 5
References......Page 16
5.4.3 Building the Hardware/Software Interface......Page 17
2.2.1 Architecture Resources Description......Page 25
ISA Specification......Page 26
Instruction Behavior Description......Page 28
4.8 Refining the Model......Page 29
2.2.3 The Evolution of ArchC Towards Platform Modeling......Page 30
References......Page 31
1.1 The ESL Concept......Page 10
1.4 Target Audience, Scope and Organization......Page 15
2.1 Basic SystemC Concepts......Page 18
2.2 Introduction to ArchC......Page 23
3.1 Introduction......Page 32
3.2 The Evolution Towards the OSCI TLM 2.0 Standard......Page 34
3.3 Main Features in the TLM 2.0 Standard......Page 35
3.4 A Small TLM Platform Example......Page 38
References......Page 43
Part II: Open-Source Models and Tools......Page 44
4.1 What Is a Model?......Page 45
4.2 Start Modeling-Architectural Information......Page 46
4.3 Declaring Instructions......Page 49
4.4 Implementing Instructions......Page 53
4.5 Running the Simulator......Page 58
4.6.1 Using the GDB Interface......Page 60
4.6.2 Implementing the GDB Interface......Page 61
4.7 Compiler and Operating System Support......Page 69
4.7.1 The Helper Methods......Page 70
4.7.2 ABI Stub Library......Page 72
4.7.3 Startup File......Page 73
4.9 Going Faster-How to Improve Your Simulator Performance......Page 74
References......Page 75
Chapter 5: Building Platform Models with SystemC......Page 77
5.1 ArchC and TLM Interface......Page 78
5.2 Platforms with ArchC......Page 80
5.3.1 A Processor-Memory Platform......Page 81
5.3.2 Dual Core Platform......Page 84
5.4.1 Profiling......Page 90
5.4.3 Building the Hardware/Software Interface......Page 93
5.4.4 The Next Steps Towards Parallel Software......Page 101
6.1 Introduction......Page 105
6.2 Language Support for Binary Tools......Page 107
6.2.1 Assembly Language Symbols......Page 108
6.2.3 Instruction Encoding and Modifiers......Page 109
6.2.4 Pseudo Instructions......Page 112
6.3.1 GNU Binutils Package......Page 113
6.3.2 Automatic Binutils Retargeting......Page 114
6.3.3 Opcodes Library Generation......Page 115
6.3.6 Link Editor Generation......Page 116
6.3.7 Summary of Generated Files......Page 118
References......Page 120
Part III: Advanced Topics......Page 121
7.1 Introduction......Page 122
7.2 Model Debugging and Verification in SystemC......Page 123
7.3 Why Computational Reflection?......Page 124
7.4 Enabling Data Introspection in SystemC......Page 125
7.5 Debugging a Platform Simulation Model......Page 127
References......Page 133
8.1 SystemC Extensions for Power Modeling......Page 134
8.1.1 The Extended Design Flow......Page 135
8.1.2 The SystemC Extensions......Page 136
8.2 Instrumentation of a SystemC Description......Page 137
8.3 Support for Characterization at the Gate Level......Page 138
8.3.1 Integration of Macromodels in PowerSC......Page 139
8.4.1 Downloading......Page 145
Building PowerSC......Page 146
Building PSCLibTools......Page 147
8.4.4 Running PowerSC......Page 148
References......Page 149
Index......Page 150
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