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Electrical Characteristics of the Three-Dimensional Interconnection Structure for the Chip Stack Package with Cu through Vias

✍ Scribed by Kwang-Yong Lee; Teck-Su Oh; Jae-Ho Lee; Tae-Sung Oh


Book ID
107453537
Publisher
Springer US
Year
2007
Tongue
English
Weight
364 KB
Volume
36
Category
Article
ISSN
0361-5235

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