Effect of thin Si insertion at metal gate/high-k interface on electrical characteristics of MOS device with La2O3
✍ Scribed by D. Kitayama; T. Koyanagi; K. Kakushima; P. Ahmet; K. Tsutsui; A. Nishiyama; N. Sugii; K. Natori; T. Hattori; H. Iwai
- Publisher
- Elsevier Science
- Year
- 2011
- Tongue
- English
- Weight
- 464 KB
- Volume
- 88
- Category
- Article
- ISSN
- 0167-9317
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✦ Synopsis
The effect of a thin Si layer insertion at W/La 2 O 3 interface on the electrical characteristics of MOS capacitors and transistors is investigated. A suppression in the EOT increase can be obtained with Si insertion, indicating the inhibition of diffusion of oxygen atoms into La 2 O 3 layer by forming an amorphous La-silicate layer at the W/La 2 O 3 interface. In addition, positive shifts in V fb and V th caused by Si insertion implies the formation of amorphous La-silicate layer at the top of La 2 O 3 dielectrics reduces the positive fixed charges induced by the metal electrode. Consequently, a large improvement in mobility has been confirmed for both at peak value and at high E eff of 1 MV/cm with Si inserted nFETs. Although a degradation trend on EOT scaling has been observed, the insertion of thin Si layer is effective in pushing the scaling limit.